| ‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘ KAWASAKI STEEL TECHNICAL REPORT No.30 ( August 1994 ) Special Issue on LSI ‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘‘ |
| 0.8-micron CMOS ASCPs Hisaya Keida, Hiroyuki Hayashi, Kyo-ichi Kissei |
|
Synopsis : The 0.8Κm double layer metal ASCPs (Application Specific Customized Products such as gate array, embedded array and standard cell) have been developed. All products have achieved one of the highest raw gate count and the least power in the industry. The circuit on the chip has become larger, and the difficulty of the test has increased dramatically. Considering this situation, Kawasaki Steel has decided to introduce the CrossCheck CX-ArrayTest technology into all of the 0.8-micron ASIC products. CrossCheck CX-ArrayTest features the ATPG (automatic test pattern generation) even for the asynchronous circuit. Kawasaki Steel also has developed the BIST circuit for memory testing and JTAG compatible boundary scan circuit for board level testing. For very large system design, the memory or other large functions are indispensable. The 0.8Κm ASCPs support the on-chip memory compiler and the originally developed 8-bit CPU core which is compatible with Zilog Z80. |
| TextiPDF: 6p./287kbj |